| 引用本文: | 张志文,曾志兵,罗隆福,王伟,郭斌,王承林.基于新型全数字锁相环的同步倍频技术[J].电力自动化设备,2010,(2): |
| .Synchronous frequency multiplication technology based on total digital phase-locked loop[J].Electric Power Automation Equipment,2010,(2): |
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| 摘要: |
| 为了实时跟踪电网频率的变化,提高直流输电系统中换流器触发脉冲控制精度,提出了一种基于新型全数字锁相环的同步倍频技术。该新型数字锁相环在传统数字锁相环的基础上加入了自适应模值控制模块,大幅提高了锁相速度和精度。在此基础上,利用近似补偿方法设计出的同步倍频模块能在高精度要求下对电网频率同步任意倍频,给换流器触发控制系统提供精准的时钟基准,提高相位控制精度,削弱换流器产生的非特征谐波。利用现场可编程门阵列(FPGA)为载体,在QUARTUSⅡ软件环境下,设计出了基于全数字锁相环的同步倍频装置,并通过软件仿真和实验测试验证了该技术的正确性和优越性。 |
| 关键词: 全数字锁相环 同步数字倍频 脉冲发生器 直流输电 FPGA |
| DOI： |
| 分类号:TN911.8 |
| 基金项目: |
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| Synchronous frequency multiplication technology based on total digital phase-locked loop |
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ZHANG Zhiwen ZENG Zhibing LUO Longfu WANG Wei GUO Bin WANG Chenglin
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| Abstract: |
| A synchronous frequency multiplication technology based on total DPLL(Digital Phase-Locked Loop) is presented to follow grid frequency in real time and improve the pulse control precision of converter in direct current transmission system,which adds a parameter-adaptive control module to traditional DPLL to improve the phase-lock speed and precision. The synchronous frequency multiplication module designed by the approximate compensation method based on it can multiply the grid frequency by any times to pro... |
| Key words: DPLL digital synchronous frequency multiplication pulse producer HVDC FPGA |
