引用本文:黄如海,董云龙,张进,仲浩,邹铁锐,齐慧文.基于ARM架构柔性直流控制保护系统的低链路延时优化设计[J].电力自动化设备,2024,44(4):218-224
HUANG Ruhai,DONG Yunlong,ZHANG Jin,ZHONG Hao,ZOU Tierui,QI Huiwen.Optimization design of low link delay for VSC-HVDC control and protection system based on ARM architecture[J].Electric Power Automation Equipment,2024,44(4):218-224
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基于ARM架构柔性直流控制保护系统的低链路延时优化设计
黄如海1, 董云龙1, 张进2, 仲浩1, 邹铁锐3, 齐慧文4
1.南京南瑞继保电气有限公司,江苏 南京 211102;2.国家电网有限公司特高压事业部,北京 100031;3.国网经济技术研究院有限公司,北京 102209;4.国网山西省电力公司经济技术研究院,山西 太原 030021
摘要:
基于进阶精简指令集机器(ARM)架构多核处理器芯片设计了柔性直流控制保护系统新一代平台,提出适用于柔性直流输电的4层控制系统通用架构,给出新平台控制保护主机配置方案及功能配置原则。建立换流器高频阻抗简化模型,推导得到负阻尼频率与控制链路延时的数学关系。分析柔性直流控制系统的链路延时构成,提出一种链路复用的在线延时测试方法;基于多核架构与高速接口,研究控制系统的低延时优化方案。最后,在基于实际工程参数的实时仿真系统中,对ARM架构新平台开展了功能和性能测试,并验证了低延时优化方案的有效性。
关键词:  柔性直流输电  继电保护  控制保护  ARM架构  控制链路延时  高频阻抗  负阻尼
DOI:10.16081/j.epae.202309006
分类号:TM77
基金项目:国家电网有限公司科技项目(5100-202256001A-1-1-ZN)
Optimization design of low link delay for VSC-HVDC control and protection system based on ARM architecture
HUANG Ruhai1, DONG Yunlong1, ZHANG Jin2, ZHONG Hao1, ZOU Tierui3, QI Huiwen4
1.NR Electric Co.,Ltd.,Nanjing 211102, China;2.UHV Transmission Business Unit of State Grid Corporation of China, Beijing 100031, China;3.State Grid Economic and Technological Research Institute Co.,Ltd.,Beijing 102209, China;4.State Grid Shanxi Economic and Technical Research Institute, Taiyuan 030021, China
Abstract:
Based on advanced risc machine(ARM) multi-core processor, a new platform of voltage source converter based high voltage direct current(VSC-HVDC) control and protection system is designed. The common structure of four-layer control system for VSC-HVDC is proposed, and the configuration scheme and functional configuration principles of the control and protection devices of new platform are given. Then, a simplified high-frequency impedance model of the converter is established and the mathematical relationship between negative damping frequency and control link delay is derived. Then, the link delay composition of VSC-HVDC control system is analyzed, and a link multiplex method for the control link delay online test is proposed. Based on the multi-core architecture and the high-speed interface, the optimization schemes for reducing the control system delay are studied. In the real-time simulation system(RTDS) based on the parameters of a practical project, the function and performance of the new platform are tested, and the effectiveness of the low-latency optimization scheme is verified.
Key words:  VSC-HVDC power transmission  relay protection  control and protection  ARM architecture  control link delay  high frequency impedance  negative damping

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